A Stub Equalizer for Bidirectional and Single-Ended Channels in NAND Memory Storage Device Systems

In memory devices, such as solid-state drive, multitopology is used for interfaces where multiple memory packages are connected to a controller using a branched transmission line. Impedance mismatching caused by the branches and unwanted reflection from deactivated packages inevitably degrades signal quality, limiting the data rate of the interface. In this article, a simple stub equalizer is proposed to improve the data rate of the memory interface. An open-ended stub is placed between a transmitter and a receiver, and the length, impedance, and location of the stub line are determined to properly cancel the reflection from other branches. Parameters are optimized based on the peak distortion analysis and an exhaustive search considering both read and write modes. The improvements are validated through eye-diagram simulations

ROBUST INCREMENTAL ADAPTATION OF GMM IN SPEAKER RECOGNITION

ABSTRACT: Speaker model in speaker recognition system is to be trained from a large data set uttered in multiple sessions. The large data set requires larger amount of memory and computation, and practically it's hard to make users utter a large amount of data in several sessions. Recently proposed incremental adaptation methods cover the problems. However, the data set uttered from multiple sessions is vulnerable to outliers from irregular utterance variation and presence of noise, which results in inaccurate speaker model. In this paper, we propose a robust incremental adaptation method to minimize the influence of outliers on speaker model using Gaussian Mixture Model. The robust adaptation is obtained from an incremental version of M-estimation. Speaker model is initially trained from small amount of data and it is adapted recursively according to new data available. Experimental results from the data set gathered over seven months show that the proposed method is robust against outliers

Modeling of Rf Interference Caused by Solid-State Drive Noise

In this paper, modeling of RFI problem caused by a solid-state drive (SSD) in a laptop is proposed. Two noise sources (one outside and one inside a cavity) in the SSD are reconstructed as dipole moments with magnitude-only near-field scanning data. The dipole moment inside a cavity is then replaced by a Huygens\u27 box covering four side surfaces of the cavity using a numerical simulation. The noise voltage at an RF antenna port is calculated by combining the two reconstructed noise sources with measured transfer functions. The model is successfully validated through a comparison of the calculation with measurement results

A Stub Equalizer for Bidirectional and Single-Ended Channels in NAND Memory Storage Device Systems

In memory devices, such as solid-state drive, multitopology is used for interfaces where multiple memory packages are connected to a controller using a branched transmission line. Impedance mismatching caused by the branches and unwanted reflection from deactivated packages inevitably degrades signal quality, limiting the data rate of the interface. In this article, a simple stub equalizer is proposed to improve the data rate of the memory interface. An open-ended stub is placed between a transmitter and a receiver, and the length, impedance, and location of the stub line are determined to properly cancel the reflection from other branches. Parameters are optimized based on the peak distortion analysis and an exhaustive search considering both read and write modes. The improvements are validated through eye-diagram simulations

A Generalized Power Supply Induced Jitter Model based on Power Supply Rejection Ratio Response

In this work, a generalized power supply induced jitter (PSIJ) model is proposed. The PSIJ sensitivity is obtained based on the evaluation of driver power supply rejection ratio (PSRR) response. The voltage ripple at the driver output is transformed into driver output jitter with the slope of the switching edge. The time-averaged effect of power noise during the time range of driver propagation delay is also considered. The proposed model is applied to estimate the PSIJ sensitivity for typical inverter type of drivers and a low-voltage differential signaling (LVDS) type of current mode differential transmitter. Depending on the transistor working region in the driver, the PSIJ sensitivity frequency dependence could be dominated by either the propagation delay or the PSRR response. The accuracy of the predicted PSIJ sensitivity is verified by simulation. Reasonably good accuracy has been achieved in terms of both the magnitude and phase

An Enhanced Statistical Analysis Method for I/O Links Considering Supply Voltage Fluctuations and Inter-Symbol-Interference

Statistical link analysis methods were previously developed for effective computation of bit error rate due to intersymbol interference (ISI). In addition to ISI, supply voltage fluctuations at output drivers can cause jitter and amplitude uncertainty in I/O links. In this paper, the enhanced statistical link analysis method considering both ISI and supply voltage fluctuations is clearly reformulated and experimentally validated step by step by various measurements. A silicon integrated circuit (IC) is designed, fabricated, and assembled on a manufactured printed circuit board (PCB). The supply voltage fluctuations on the IC with regard to the receiver reference voltage are extracted from measurements at the IC and PCB. Also, the impulse response of the total output channel is extracted from the measurements of the driver and channel characteristics. The statistical eye diagrams of the channel output including both ISI effects and the supply voltage fluctuations are then calculated and validated by comparison with the direct eye measurements.close0

Calculation of Power-Supply-Induced Jitter at a 3-D IC channel including ESD Protection Circuits

The step response of a single ended output driver with silicon interposer channel is derived including the parasitics of ESD protection circuits. The probability density functions of the output voltage due to supply voltage fluctuations are also analytically calculated. With changing the frequency of supply voltage fluctuations, the effect of ESD parasitics on the output jitter is calculated and compared

Closed-Form Expressions for the Noise Voltage Caused by a Burst Train of IC Switching Currents on a Power Distribution Network

A burst stimulus of data is a common activity in circuits and systems. The supply noise voltage waveform induced by a burst train of integrated circuit (IC) switching currents is rigorously derived for a power distribution network (PDN) with power traces, commonly used in handheld devices. Closed-form expressions are proposed to quickly estimate the amount of voltage drop and overshoot and to develop more complete PDN design methodology as improved target impedances. The proposed PDN noise expressions are also validated with SPICE simulation and measurements using a fabricated IC and PCB.close1

Improved Statistical Link Path Analysis Considering Both Channel ISI and Supply Voltage Fluctuations

The statistical analysis method is improved to consider both the channel ISI and the supply voltage fluctuations for accurate estimation of BER. In an I/O link using a linear buffer, the pull-up/down transition with the supply and ground voltage fluctuation can be separately analyzed as the step pulse response and the response due to alternate supply and ground fluctuations. The step pulse response of the channel is simply obtained by transient simulations, whereas the response due to the supply and ground fluctuations is computed from the frequency harmonics of the fluctuations using the frequency-domain channel model. With the channel response due to the supply fluctuations, the PDFs of the amplitude variation can be solved through analytical probability calculations. The PDF of the channel response due to supply fluctuations can be effectively combined with the ISI PDF obtained from the step response, which can provide the accurate total statistical eye and BER

The LDB1 Complex Co-opts CTCF for Erythroid Lineage-Specific Long-Range Enhancer Interactions

Summary: Lineage-specific transcription factors are critical for long-range enhancer interactions, but direct or indirect contributions of architectural proteins such as CCCTC-binding factor (CTCF) to enhancer function remain less clear. The LDB1 complex mediates enhancer-gene interactions at the β-globin locus through LDB1 self-interaction. We find that an LDB1-bound enhancer upstream of carbonic anhydrase 2 (Car2) activates its expression by interacting directly with CTCF at the gene promoter. Both LDB1 and CTCF are required for enhancer-Car2 looping, and the domain of LDB1 contacted by CTCF is necessary to rescue Car2 transcription in LDB1-deficient cells. Genome-wide studies and CRISPR/Cas9 genome editing indicate that LDB1-CTCF enhancer looping underlies activation of a substantial fraction of erythroid genes. Our results provide a mechanism by which long-range interactions of architectural protein CTCF can be tailored to achieve a tissue-restricted pattern of chromatin loops and gene expression. : It is unclear whether or how architectural proteins such as CTCF might contribute to interactions between enhancers and target genes. Lee et al. show that CTCF interacts directly with LDB1 and that a significant fraction of erythroid genes loop to LDB1-complex-occupied enhancers via CTCF sites within their promoters. Keywords: LDB1, CTCF, enhancer, looping, erythroid cell